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FPG-eh LORAN-C Positioning System (Simulation)

Design Demonstration

In this section, we demonstrate the operation of our LORAN-C Positioning System. We completed this sytem in April 2007 as part of a DSP Design course (EECS 452) at the University of Michigan (Ann Arbor).

When our system is operational, we present the last obtained coordinate on a Google Map. This system runs continuously within the Electrical Engineering and Computer Science (EECS) building. Years ago, researchers placed a LORAN-C antenna on the roof of this building to obtain navigational information; today, we use its signals to fix our position. Thus, the coordinates obtained by our system should not vary greatly with time. Usually, our system generates a new coordinate once per minute. Under normal operation, this web page obtains these coordinates and displays them both in written form and upon the Google Map; in addition, we determine the distance in feet between the actual and obtained coordinates of the EECS building.

Unfortunately, we cannot run our system forever, and must periodically turn our system off. When we do so, we run this web page in Simulation Mode. In Simulation Mode, we cycle through one hour of real data, and update the web page every sixty seconds. As before, we display our coordinates in written form, and calculate the distance between the obtained and actual coordinates of the EECS building. Again, this Mode is based on coordinates that our system actually obtained; thus, it adequately approximates the operation of our system under normal circumstances.

Below, we detail the design of our LORAN-C Positioning System. We freely provide algorithms, hardware descriptions, C-style functions, and statistics to help newer engineers develop a LORAN-C system. Our design includes novel approaches of identifying pulse starts and determining coordinates from TDs.

MATLAB Simulations

Our team began its research and development process by creating various MATLAB scripts to analyze and manipulate LORAN-C signals. We obtained our initial signals from data collected approximately three years ago by a commercial LORAN-C receiver. This receiver was located within the EECS building, and sampled data at a rate of 800 kHz. At the time, we expected our system's sample rate to be slightly larger; thus, to provide ourselves the ability to run our MATLAB scripts on data collected by our own system, we wrote the scripts to anticipate changes in sample rate.

We spent several weeks writing these MATLAB scripts. These scripts aren't particularly complex; however, by writing them, we gained invaluable insight into the LORAN-C signal specification. These scripts also allowed us to test various algorithms before transferring them onto a DSP chip. Below, we list and describe these scripts; they were written specifically to fit our development needs, and might therefore not be suitable for every design:

  • openLORAN.m: Import several LORAN signals into the MATLAB Workspace.
  • createPulse.m: Create an ideal MATLAB pulse.
  • plotCorr.m: Cross-Correlate two signals and plot the results.
  • delays2coord.m: Convert time delays into coordinates (MICM).
  • td2coord.m: Convert time delays into coordinates (KICM).

    Hardware Setup

    To accurately fix a position with the LORAN-C signal, we need to manipulate a clean data set. Thus, we need hardware that both obtains a LORAN-C signal and conditions it for the DSP. We obtain our signal directly from a commercial LORAN-C receiver; this receiver also outputs a steady 100 kHz sine-wave clock. To manipulate our signal in a DSP, we must feed it through an analog-to-digital converter (ADC); unfortunately, our ADC only converts analog voltages between zero and five volts. Thus, we pass the LORAN-C signal - which ranges from approximately -2 to +2 volts - through a level-shifting amplification circuit, which shifts the signal into the zero to five volt range. The sine wave clock is also fed into a Schmitt trigger to appropriately square it for the rest of our system.

    High-Level System Diagram

    Figure 1: Top Level Hardware Diagram

    Our level-shifted signal and square wave clock are both fed into our FPGA. Our FPGA provides the hardware to obtain our sampled LORAN-C data and transfer it to the DSK (DSP Starter Kit). We use the Xilinx Spartan3 XC3S1000 FPGA in our system; it provides more than enough gates for our design (1000 K), and contains a simple interface to the DSK. This DSK is a TI TMS320C5510, which provides an acceptable clock speed (200 MHz) and, for our purposes, sufficient off-chip RAM (8 MB). Once our DSK obtains a data point from the McBSP, it sends the point back to the FPGA along the same McBSP bus. Afterwards, the FPGA feeds the data point into a digital-to-analog converter (DAC), which then sends the LORAN-C signal to an oscilloscope.

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